Texas Instruments SN74AC373PWR Manual


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Side 1/27
SN54AC373, SN74AC373
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SCAS540D − OCTOBER 1995 − REVISED OCTOBER 2003
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D2-V to 6-V VCC Operation
DInputs Accept Voltages to 6 V
DMax tpd of 9.5 ns at 5 V
D3-State Noninverting Outputs Drive Bus
Lines Directly
DFull Parallel Access for Loading
description/ordering information
These 8-bit latches feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. The devices
are particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
The eight latches are D-type transparent latches.
When the latch-enable (LE) input is high, the Q
outputs follow the data (D) inputs. When LE is
taken low, the Q outputs are latched at the logic
levels set up at the D inputs.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low logic levels) or the
high-impedance state. In the high-impedance
state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines in bus-organized systems without need for
interface or pullup components.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
ORDERING INFORMATION
TAPACKAGEORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP − N Tube SN74AC373N SN74AC373N
SOIC DW
Tube SN74AC373DW
AC373
SOIC − DW Tape and reel SN74AC373DWR AC373
−40° °C to 85 C SOP − NS Tape and reel SN74AC373NSR AC373
40 C
to
85 C
SSOP − DB Tape and reel SN74AC373DBR AC373
TSSOP PW
Tube SN74AC373PW
AC373
TSSOP − PW Tape and reel SN74AC373PWR AC373
CDIP − J Tube SNJ54AC373J SNJ54AC373J
−55° °C to 125 C CFP − W Tube SNJ54AC373W SNJ54AC373W
55 C
to
125 C
LCCC − FK Tube SNJ54AC373FK SNJ54AC373FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright © 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
VCC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
LE
3 2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
8D
7D
7Q
6Q
6D
2D
2Q
3Q
3D
4D
1D
1Q
OE
5Q
5D 8Q
4Q
GND
LE
V
CC
SN54AC373 . . . FK PACKAGE
(TOP VIEW)
SN54AC373 . . . J OR W PACKAGE
SN74AC373 . . . DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.


Produkt Specifikationer

Mærke: Texas Instruments
Kategori: Ikke kategoriseret
Model: SN74AC373PWR

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