Texas Instruments SN74ALS259N Manual


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SDAS217A − DECEMBER 1982 − REVISED DECEMBER 1994
Copyright 1994, Texas Instruments Incorporated
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
8-Bit Parallel-Out Storage Register
Performs Serial-to-Parallel Conversion With
Storage
Asynchronous Parallel Clear
Active-High Decoder
Enable/Disable Input Simplifies Expansion
Expandable for n-Bit Applications
Four Distinct Functional Modes
Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
description
These 8-bit addressable latches are designed for
general-purpose storage applications in digital
systems. Specific uses include working registers,
serial-holding registers, and active-high decoders
or demultiplexers. They are multifunctional
devices capable of storing single-line data in eight
addressable latches and being a 1-of-8 decoder or
demultiplexer with active-high outputs.
Four distinct modes of operation are selectable by
controlling the clear (CLR) and enable (G) inputs
as shown in the function table. In the
addressable-latch mode, data at the data-in
terminal is written into the addressed latch. The
addressed latch follows the data input with all unaddressed latches remaining in their previous states. In the
memory mode, all latches remain in their previous states and are unaffected by the data or address inputs. To
eliminate the possibility of entering erroneous data in the latches, G should be held high (inactive) while the
address lines are changing. In the 1-of-8 decoding or demultiplexing mode, the addressed output follows the
level of the D input with all other outputs low. In the clear mode, all outputs are low and unaffected by the address
and data inputs.
The SN54ALS259 is characterized for operation over the full military temperature range of 55°C to 125°C. The
SN74ALS259 is characterized for operation from 0°C to 70°C.
Function Tables
FUNCTION
INPUTS OUTPUT OF
ADDRESSED
EACH
OTHER
FUNCTION
CLR G
ADDRESSED
LATCH
OTHER
OUTPUT
FUNCTION
H L D QiO Addressable latch
H H QiO QiO Memory
L LL D 8-line demultiplexer
L H L L Clear
D = the level at the data input.
QiO = the level of Q
i (i = Q, 1, . . . 7 as appropriate) before the indicated
steady-state input conditions were established.
SN54ALS259 . . . J PACKAGE
SN74ALS259 . . . D OR N PACKAGE
(TOP VIEW)
3 2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
G
D
NC
Q7
Q6
S2
Q0
NC
Q1
Q2
SN54ALS259 . . . FK PACKAGE
(TOP VIEW)
S1
S0
NC
Q4
Q5 CLR
Q3
GND
NC
NC − No internal connection
V
CC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
S0
S1
S2
Q0
Q1
Q2
Q3
GND
VCC
CLR
G
D
Q7
Q6
Q5
Q4
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Produkt Specifikationer

Mærke: Texas Instruments
Kategori: Ikke kategoriseret
Model: SN74ALS259N
Type: Logisk kredsløb
Bredde: 19.69 mm
Dybde: 6.6 mm
Højde: 4.57 mm
Antal pr. pakke: 25 stk
Pakkedybde: 506 mm
Pakkebredde: 13.97 mm
Pakkehøjde: 11.23 mm
Opbevaringstemperatur (T-T): -65 - 150 °C
Driftstemperatur (T-T): 0 - 70 °C
Pakketype: PDIP
Antal stifter: 16
Bredde (med stifter): 19.69 mm
Højde (med stifter): 8.26 mm
Dybde (med stifter): 10.92 mm

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